EDA课程设计——清零置数十进制计数器
程序清单：
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity cdu10 is
port(clk,en,load,reset:in std_logic;
d:in std_logic_vector(3 downto 0);
cout:out std_logic;
q:out std_logic_vector(3 downto 0));
end cdu10;
architecture exx1 of cdu10 is
signal qq:std_logic_vector(3 downto 0);
begin
p0:process(clk,en,load,reset)
begin
if( reset='0' )then qq<=\"0000\";
elsif (clk'event and clk='1') then
if load='0' then qq<=d;
elsif (en='1') then
if qq=\"1001\" then qq<=\"0000\";
else qq<=qq+'1';
end if;
end if;
end if;
end process p0;
q<=qq;
p1:process( qq )
begin
if qq=\"1001\" then cout<='1';
else cout<='0';
end if;
end process p1;
end exx1;
仿真波形：
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