专利名称：Management of Processor Performance
Based on User Interrupts
发明人：Jacob Jun Pan,Ashok Raj,Srinivas Pandruvada申请号：US15864290申请日：20180108
公开号：US20190213153A1公开日：20190711
专利附图：
摘要：In an embodiment, a processor for performance state adjustment includes aplurality of processing engines (PEs), a power control unit, and an input/output memorymanagement unit (IOMMU). The IOMMU is to determine a destination PE for a user
interrupt based on mapping data of the IOMMU, and to send a notification of the userinterrupt to the power control unit. The notification indicates the destination PE for theuser interrupt. The power control unit is to adjust a performance state of the destinationPE in response to the notification of the user interrupt. Other embodiments aredescribed and claimed.
申请人：Intel Corporation
地址：Santa Clara CA US
国籍：US
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