图1是引脚图
图2是内部结构图
英文解释，建议有一定英文基础的朋友阅读：The HEF4060B is a 14-stage ripple-carry binary counter/divider and oscillator with three oscillator terminals, ten buffered outputs and an overriding asynchronous master reset input. The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. The counter advances on the negative-going transition of RS. A HIGH level on MR resets the counter (O3 to O9 and O11 to O13 = LOW), independent of other input conditions. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
脉冲发生器是数字钟的核心部分，它的精度和稳定度决定了数字钟的质量，通常用晶体振荡器发出的脉冲经过整形、分频获得1Hz的秒脉冲。如晶振为32768 Hz，通过15次二分频后可获得1Hz的脉冲输出，电路图如图3所示。
图3 CD4060定时电路
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